Example showing hardware loop unrolling opcode src1 src2 dest cycles LD ------ ---- ---- ---- ------ . | F0 true dependency LD 0(R1) -- F0 2 . v ADDF F0 F2 F4 4 . ADDF ST F4 0(R1) -- 2 . | F4 true dependency SUBI R1 1 R1 1 . v BNEZ R1 loop -- 1 . ST . . R1 anti-dependency v v SUBI | R1 true dependency v BNEZ OOO instruction pipeline Dispatch ... Issue | Execute | Complete ... Retire cycle diagram_________________________ 0/LD: DIEECR . \ 1/AD: D IEEEECR . | iteration 1 2/ST: .D IEECR. | 3/SI: .DIEC R. | 4/BN: . D IEC ___ R _____________/ 5/LD: . D IEEC R \ 6/AD: . D IEEEEC.R | iteration 2 7/ST: . D IEECR | (starts before iteration 1 ends) 8/SI: . DIEC . R | 9/BN: .__ D IEC __._ R _________/ 10/LD: . DIEEC . R \ 11/AD: . D IEEEEC R | iteration 3 12/ST: . D .IEECR | (starts before iteration 1 ends) 13/SI: . DIEC . R | 14/BN: ._____ D IEC .___ R _______/ 15/LD: . D IEEC R \ 16/AD: . D IEEEEC R | iteration 4 17/ST: . D . IEECR | (starts before iteration 1 ends) 18/SI: . DIEC. R | 19/BN: .________ D IEC ____ R ___/ 20/LD: . D IEEC R \ . . \_____________/ latency of iteration 1 ---cycle 0--- dispatch inst. w/ tag 0 type 0 dispatch inst. w/ tag 1 type 1 tag reg c value pc | tag inst cyc | tag inst tag r tag r ---------------------------+---------------------+---------------------------- rob[ 1]: 1 F4 0 0.0 1 | | iw[ 1]: 1 AD 0 0 -1 1 rob[ 0]: 0 F0 0 0.0 0 | | iw[ 0]: 0 LD -1 1 -1 1 ---cycle 1--- issue inst. w/ tag 0 type 0 dispatch inst. w/ tag 2 type 2 dispatch inst. w/ tag 3 type 3 tag reg c value pc | tag inst cyc | tag inst tag r tag r ---------------------------+---------------------+---------------------------- rob[ 3]: 3 R1 0 0 3 | | iw[ 2]: 3 SI -1 1 -1 1 rob[ 2]: 2 - 0 - 2 | | iw[ 1]: 2 ST 1 0 -1 1 rob[ 1]: 1 F4 0 0.0 1 | | iw[ 0]: 1 AD 0 0 -1 1 rob[ 0]: 0 F0 0 0.0 0 | fn[ 0]: 0 LD 2 | ---cycle 2--- execute inst. w/ tag 0 type 0 issue inst. w/ tag 3 type 3 dispatch inst. w/ tag 4 type 4 tag reg c value pc | tag inst cyc | tag inst tag r tag r ---------------------------+---------------------+---------------------------- rob[ 4]: 4 - 0 - 4 | | iw[ 2]: 4 BN 3 0 -1 1 rob[ 3]: 3 R1 0 0 3 | fn[ 8]: 3 SI 1 | rob[ 2]: 2 - 0 - 2 | | iw[ 1]: 2 ST 1 0 -1 1 rob[ 1]: 1 F4 0 0.0 1 | | iw[ 0]: 1 AD 0 0 -1 1 rob[ 0]: 0 F0 0 0.0 0 | fn[ 0]: 0 LD 1 | ---cycle 3--- execute inst. w/ tag 0 type 0 execute inst. w/ tag 3 type 3 dispatch inst. w/ tag 5 type 0 dispatch inst. w/ tag 6 type 1 tag reg c value pc | tag inst cyc | tag inst tag r tag r ---------------------------+---------------------+---------------------------- rob[ 6]: 6 F4 0 0.0 1 | | iw[ 4]: 6 AD 5 0 -1 1 rob[ 5]: 5 F0 0 0.0 0 | | iw[ 3]: 5 LD 3 0 -1 1 rob[ 4]: 4 - 0 - 4 | | iw[ 2]: 4 BN 3 0 -1 1 rob[ 3]: 3 R1 0 0 3 | fn[ 8]: 3 SI 0 | rob[ 2]: 2 - 0 - 2 | | iw[ 1]: 2 ST 1 0 -1 1 rob[ 1]: 1 F4 0 0.0 1 | | iw[ 0]: 1 AD 0 0 -1 1 rob[ 0]: 0 F0 0 0.0 0 | fn[ 0]: 0 LD 0 | ---cycle 4--- complete inst. w/ tag 0 type 0 complete inst. w/ tag 3 type 3 issue inst. w/ tag 1 type 1 issue inst. w/ tag 4 type 4 dispatch inst. w/ tag 7 type 2 dispatch inst. w/ tag 8 type 3 tag reg c value pc | tag inst cyc | tag inst tag r tag r ---------------------------+---------------------+---------------------------- rob[ 8]: 8 R1 0 0 3 | | iw[ 4]: 8 SI 3 1 -1 1 rob[ 7]: 7 - 0 - 2 | | iw[ 3]: 7 ST 6 0 3 1 rob[ 6]: 6 F4 0 0.0 1 | | iw[ 2]: 6 AD 5 0 -1 1 rob[ 5]: 5 F0 0 0.0 0 | | iw[ 1]: 5 LD 3 1 -1 1 rob[ 4]: 4 - 0 - 4 | fn[ 9]: 4 BN 1 | rob[ 3]: 3 R1 1 99 3 | | rob[ 2]: 2 - 0 - 2 | | iw[ 0]: 2 ST 1 0 -1 1 rob[ 1]: 1 F4 0 0.0 1 | fn[ 2]: 1 AD 4 | rob[ 0]: 0 F0 1 100.0 0 | | ---cycle 5--- retire inst. w/ tag 0 type 0 execute inst. w/ tag 1 type 1 execute inst. w/ tag 4 type 4 issue inst. w/ tag 5 type 0 issue inst. w/ tag 8 type 3 dispatch inst. w/ tag 9 type 4 tag reg c value pc | tag inst cyc | tag inst tag r tag r ---------------------------+---------------------+---------------------------- rob[ 8]: 9 - 0 - 4 | | iw[ 3]: 9 BN 8 0 -1 1 rob[ 7]: 8 R1 0 0 3 | fn[ 8]: 8 SI 1 | rob[ 6]: 7 - 0 - 2 | | iw[ 2]: 7 ST 6 0 3 1 rob[ 5]: 6 F4 0 0.0 1 | | iw[ 1]: 6 AD 5 0 -1 1 rob[ 4]: 5 F0 0 0.0 0 | fn[ 0]: 5 LD 2 | rob[ 3]: 4 - 0 - 4 | fn[ 9]: 4 BN 0 | rob[ 2]: 3 R1 1 99 3 | | rob[ 1]: 2 - 0 - 2 | | iw[ 0]: 2 ST 1 0 -1 1 rob[ 0]: 1 F4 0 0.0 1 | fn[ 2]: 1 AD 3 | ---cycle 6--- complete inst. w/ tag 4 type 4 execute inst. w/ tag 5 type 0 execute inst. w/ tag 1 type 1 execute inst. w/ tag 8 type 3 dispatch inst. w/ tag 10 type 0 dispatch inst. w/ tag 11 type 1 tag reg c value pc | tag inst cyc | tag inst tag r tag r ---------------------------+---------------------+---------------------------- rob[10]: 11 F4 0 0.0 1 | | iw[ 5]: 11 AD 10 0 -1 1 rob[ 9]: 10 F0 0 0.0 0 | | iw[ 4]: 10 LD 8 0 -1 1 rob[ 8]: 9 - 0 - 4 | | iw[ 3]: 9 BN 8 0 -1 1 rob[ 7]: 8 R1 0 0 3 | fn[ 8]: 8 SI 0 | rob[ 6]: 7 - 0 - 2 | | iw[ 2]: 7 ST 6 0 3 1 rob[ 5]: 6 F4 0 0.0 1 | | iw[ 1]: 6 AD 5 0 -1 1 rob[ 4]: 5 F0 0 0.0 0 | fn[ 0]: 5 LD 1 | rob[ 3]: 4 - 1 - 4 | | rob[ 2]: 3 R1 1 99 3 | | rob[ 1]: 2 - 0 - 2 | | iw[ 0]: 2 ST 1 0 -1 1 rob[ 0]: 1 F4 0 0.0 1 | fn[ 2]: 1 AD 2 | ---cycle 7--- complete inst. w/ tag 8 type 3 execute inst. w/ tag 5 type 0 execute inst. w/ tag 1 type 1 issue inst. w/ tag 9 type 4 issue inst. w/ tag 10 type 0 dispatch inst. w/ tag 12 type 2 dispatch inst. w/ tag 13 type 3 tag reg c value pc | tag inst cyc | tag inst tag r tag r ---------------------------+---------------------+---------------------------- rob[12]: 13 R1 0 0 3 | | iw[ 5]: 13 SI 8 1 -1 1 rob[11]: 12 - 0 - 2 | | iw[ 4]: 12 ST 11 0 8 1 rob[10]: 11 F4 0 0.0 1 | | iw[ 3]: 11 AD 10 0 -1 1 rob[ 9]: 10 F0 0 0.0 0 | fn[ 1]: 10 LD 2 | rob[ 8]: 9 - 0 - 4 | fn[ 9]: 9 BN 1 | rob[ 7]: 8 R1 1 98 3 | | rob[ 6]: 7 - 0 - 2 | | iw[ 2]: 7 ST 6 0 3 1 rob[ 5]: 6 F4 0 0.0 1 | | iw[ 1]: 6 AD 5 0 -1 1 rob[ 4]: 5 F0 0 0.0 0 | fn[ 0]: 5 LD 0 | rob[ 3]: 4 - 1 - 4 | | rob[ 2]: 3 R1 1 99 3 | | rob[ 1]: 2 - 0 - 2 | | iw[ 0]: 2 ST 1 0 -1 1 rob[ 0]: 1 F4 0 0.0 1 | fn[ 2]: 1 AD 1 | ---cycle 8--- complete inst. w/ tag 5 type 0 execute inst. w/ tag 10 type 0 execute inst. w/ tag 1 type 1 execute inst. w/ tag 9 type 4 issue inst. w/ tag 6 type 1 issue inst. w/ tag 13 type 3 dispatch inst. w/ tag 14 type 4 tag reg c value pc | tag inst cyc | tag inst tag r tag r ---------------------------+---------------------+---------------------------- rob[13]: 14 - 0 - 4 | | iw[ 4]: 14 BN 13 0 -1 1 rob[12]: 13 R1 0 0 3 | fn[ 8]: 13 SI 1 | rob[11]: 12 - 0 - 2 | | iw[ 3]: 12 ST 11 0 8 1 rob[10]: 11 F4 0 0.0 1 | | iw[ 2]: 11 AD 10 0 -1 1 rob[ 9]: 10 F0 0 0.0 0 | fn[ 1]: 10 LD 1 | rob[ 8]: 9 - 0 - 4 | fn[ 9]: 9 BN 0 | rob[ 7]: 8 R1 1 98 3 | | rob[ 6]: 7 - 0 - 2 | | iw[ 1]: 7 ST 6 0 3 1 rob[ 5]: 6 F4 0 0.0 1 | fn[ 3]: 6 AD 4 | rob[ 4]: 5 F0 1 99.0 0 | | rob[ 3]: 4 - 1 - 4 | | rob[ 2]: 3 R1 1 99 3 | | rob[ 1]: 2 - 0 - 2 | | iw[ 0]: 2 ST 1 0 -1 1 rob[ 0]: 1 F4 0 0.0 1 | fn[ 2]: 1 AD 0 |