231 Fall 2007 -- Exam 5 Name: _______________________ Matching. Select the best answer. (2 pts. each) 1. _____ programmed I/O a. uses a buffer register for synchronization b. uses a busy-wait loop for synchronization 2. _____ interrupt-driven I/O c. uses an interrupt for synchronization d. uses a cache in the controller for 3. _____ disk seek synchronization e. time to format a track 4. _____ disk rotational delay f. time to read/write the disk sector(s) containing the physical record 5. _____ disk transfer g. time to move the read/write heads to a track h. time for the needed sector to rotate under 6. _____ raw the read/write head i. your program gets the backspace character 7. _____ cooked j. a backspace character deletes the previous character before it is sent to your program 8. _____ memory-mapped I/O k. I/O buffers are placed in the I/O controllers l. I/O buffers are placed in memory 9. _____ disk striping m. I/O can only be done by DMA controllers n. one or more extra disks are used to increase 10. ____ RAID data transfer speed o. one or more extra disks are used to provide redundancy for recovery from disk failures p. device registers are accessed using regular load and store instructions q. device registers are accessed using special input and output instructions 11. Draw a diagram of the fetch/decode/execute cycle of a computer that includes the four actions that occur when interrupts are accepted and the actions for an RTI instruction. (25 pts.) 12. Identify the standard five registers in a DMA controller. (10 pts.) 1) 2) 3) 4) 5) 13. Define "logical" and "physical" records in terms of I/O transfers. (8 pts.) 14. Briefly explain the benefit of blocking. (9 pts.) XC-1. Consider a 2 GHz processor with instructions that each need two clock cycles on average to execute. Consider also that an interrupt requires an overhead of 100 nanoseconds to transfer to an interrupt service routine, and the ISR has to execute 900 instructions on average to handle an interrupt. What is the maximum number of interrupts that can be handled in a second? (8 pts. extra credit) 15. Consider the code for the circular buffer routines on the handout. (a) Why does the variable "in" in c05 have four addresses assigned to it (0x108-0x10b / d09-912)? (4 pts.) (b) If I call put('a') immediately after I call initbuf(), what values are in these registers at line a17 in put()? (4 pts.) %g1 ____________ %o5 ____________ (c) What lines in the assembly code implement the statement c16 in put() "cbuf[in] = val;"? (4 pts.) (d) What lines in the assembly code implement the statement c28 in get() "out = (out+1)&CBUFMASK;"? (4 pts.) (e) Why is a load instruction ("ld") used in a52 but a load unsigned byte instruction ("ldub") used in a55? (4 pts.) (f) What are the values in the variables in and out after this sequence of calls: initbuf(), put('a'), put('b'), get(), put('c'), get(), put('d'), put('f'), put('g'), put('h'), get(), put('i'), put('j')? (4 pts.) in ____________ out ____________ (g) If I wanted to change CBUFSIZE to 256, what would the corresponding change to CBUFMASK need to be? (4 pts.) XC-2. Are assembly language statements a59-a60 needed? Explain why or why not. (2 pts. extra credit) c01: #define CBUFSIZE 8 a01: initbuf: c02: #define CBUFMASK 0x7 a02: sethi %hi(out), %g1 c03: a03: st %g0, [%g1+%lo(out)] c04: char cbuf[CBUFSIZE]; a04: sethi %hi(in), %g1 c05: int in, a05: st %g0, [%g1+%lo(in)] c06: out; a06: retl c07: a07: nop c08: void initbuf(void){ a08: c09: in = out = 0; a09: put: c10: } a10: save %sp, -112, %sp c11: a11: sethi %hi(in), %g1 c12: void put(char val){ a12: ld [%g1+%lo(in)], %g1 c13: if(((in+1)&CBUFMASK)==out){ a13: add %g1, 1, %g1 c14: overflow_error(); a14: and %g1, 7, %g1 c15: }else{ a15: sethi %hi(out), %o5 c16: cbuf[in] = val; a16: ld [%o5+%lo(out)], %o5 c17: in = (in+1)&CBUFMASK; a17: cmp %g1, %o5 c18: } a18: bne .LL3 c19: } a19: nop c20: a20: call overflow_error c21: char get(void){ a21: nop c22: register char val; a22: ba .LL2 c23: if(in==out){ a23: nop c24: underflow_error(); a24: .LL3: c25: return 0; a25: sethi %hi(in), %o4 c26: }else{ a26: ld [%o4+%lo(in)], %o5 c27: val = cbuf[out]; a27: sethi %hi(cbuf), %g1 c28: out = (out+1)&CBUFMASK; a28: or %g1, %lo(cbuf), %g1 c29: return val; a29: stb %i0, [%g1+%o5] c30: } a30: add %o5, 1, %o5 c31: } a31: and %o5, 7, %o5 a32: st %o5, [%o4+%lo(in)] a33: .LL2: d01: 0x100 cbuf[0] ___ a34: ret d02: 0x101 cbuf[1] ___ a35: restore d03: 0x102 cbuf[2] ___ a36: d04: 0x103 cbuf[3] ___ a37: get: d05: 0x104 cbuf[4] ___ a38: save %sp, -112, %sp d06: 0x105 cbuf[5] ___ a39: sethi %hi(in), %g1 d07: 0x106 cbuf[6] ___ a40: ld [%g1+%lo(in)], %o5 d08: 0x107 cbuf[7] ___ a41: sethi %hi(out), %g1 d09: 0x108 in a42: ld [%g1+%lo(out)], %g1 d10: 0x109 " a43: cmp %o5, %g1 d11: 0x10a " a44: bne .LL6 d12: 0x10b " ________________ a45: nop d13: 0x10c out a46: call underflow_error d14: 0x10d " a47: mov 0, %i0 d15: 0x10e " a48: ba .LL5 d16: 0x10f " ________________ a49: nop a50: .LL6: a51: sethi %hi(out), %o4 the assembly code on the right a52: ld [%o4+%lo(out)], %o5 is modified from the code given a53: sethi %hi(cbuf), %g1 by gcc -O1 -S a54: or %g1, %lo(cbuf), %g1 a55: ldub [%g1+%o5], %g1 a56: add %o5, 1, %o5 a57: and %o5, 7, %o5 a58: st %o5, [%o4+%lo(out)] a59: sll %g1, 24, %g1 a60: sra %g1, 24, %i0 a61: .LL5: a62: ret a63: restore