231 Fall 2007 -- Exam 2                             Name: _________________

No calculators.

1. Convert these numbers between signed decimal and 16-bit two's complement
   representation in hexadecimal.  (4 pts. each)

	signed decimal				two's complement (hex)

   a.	    +132				    ________

   b.	  ________				     0x0132

   c.	    -132				    ________

   d.	  ________				     0xfecd


2. Give the most negative 12-bit two's complement number in two formats:
   (2 pts. each)

   a. hexadecimal representation (two's complement): ____________

   b. decimal representation: ____________

3. Give the most positive 12-bit two's complement number in two formats:
   (2 pts. each)

   a. hexadecimal representation (two's complement): ____________

   b. decimal representation: ____________


4. Show the hexadecimal results of binary addition and subtraction of signed
   16-bit two's complement numbers. Identify any signed overflows. (8 pts. each)

      a.  0x4321                          b.  0x4321
         +0xabcd                             -0xabcd
         -------                             -------


5. Show the hexadecimal results of logic operations on 16-bit binary numbers.
   (4 pts. each)

      a.   0x4321    b.    0x4321    c. 0xabcd shift    d. 0xabcd shift right
        or 0x5555      and 0x5555       left by 2          arithmetic by 2
        ---------      ----------       ------------       ------------------


6. Give the names of the following condition code.  (4 pts.)

   N:                                V:

   Z:                                C:


7. Give a short sequence of SPARC shift and add (or subtract) instructions
   to multiply the value in register %o0 by 15 decimal and place the result
   in register %o1.  (Do not call .mul or use a multiply instruction.)
   (4 pts.)


8. Give a sequence of SPARC instructions to insert the value 0x99 into the
   next-to-most significant byte in register %o0 for any arbitrary value in
   %o0.  (You cannot assume that the byte at that position in %o0 is 0.
   E.g., 0x87654321 should become 0x87994321.)  (4 pts.)


9. Show the big-endian and little-endian byte ordering of the following data
   values.  Start the byte numbering of t[] at address 100. (8 pts.)

     char t[4]   = {'a', 'b', 'c', '\0'};
     short int u = 0x123;                /* short int is 16-bit half word */
     short int v = 0x45;

     byte address:            100   101   102   103   104   105   106   107

     big-endian ordering:     ___   ___   ___   ___   ___   ___   ___   ___

     little-endian ordering:  ___   ___   ___   ___   ___   ___   ___   ___


10. Show the SPARC code for the following program segment.  Use a simple series
    of shifts and adds to accomplish the multiplication.  (12 pts.)

        term = 0;                       You may assume these register defines:
        sum = 0;                                  define(term_r,l1)
        i = 1;                                    define(sum_r,l2)
        while( i <= 10 ){                         define(i_r,l3)
            term = term + 2*i - 1;
            sum = sum + term;
            i = i + 1;
        }


   Extra Credit: consider the updated values of "term" each time through the
   loop.  If you were to define "term" as solely a function of i (rather than
   as a recursive function of the previous value of term and an increment
   based on i, as shown above), what would the function be?  (2 pts.)


11. Show the HARDWARE STEPS required in multiplication of two unsigned 4-bit
    binary numbers, 1110 times 1101.  (1110 is the multiplicand and 1101 is
    the multiplier.)  The details of mulscc are not required, but you should
    show the C (carry) and 4-bit ACC, MQ, and MDR registers, and be sure to
    place the multiplicand and multiplier in the correct registers.  (12 pts.)
    (Note: no credit will be given for mere paper and pencil multiplication.)


Extra Credit

X1. Show the HARDWARE STEPS required in restoring division of an unsigned
    8-bit binary dividend, 00101010, by a 4-bit unsigned binary divisor,
    0111.  Use the C (carry) and 4-bit ACC, MQ, and MDR registers, and be
    sure to place the dividend and divisor in the correct registers.  (10 pts.)